Checkpoint Aware Hybrid Cache Architecture for NV Processor in Energy Harvesting Powered Systems

Speaker: Dr. Jingtong Hu

时间： 2016年5月9日10:30

地点： 办公楼310

Abstract:

Energy harvesting is one of the most promising battery alternatives to power future generation embedded systems in Internet of Things (IoT). However, energy harvesting powered embedded systems suffer from frequent execution interruption due to unstable energy supply. To bridge intermittent program execution across different power cycles, non-volatile processor (NVP) was proposed to checkpoint register contents during power failure. Together with register contents, the cache contents also need to be preserved during power failure. While pure non-volatile memory (NVM) based cache is an intuitive option, it suffers from inferior performance due to high write latency and energy overhead. In this talk, we will present a SRAM and NVM based hybrid cache in NVPs. Corresponding checkpointing aware cache replacement polices and smart checkpointing polices are also presented to achieve satisfactory performance,  efficient checkpointing upon a power failure, and fast resumption when power returns.

Bio:

Dr. Jingtong Hu is currently an Assistant Professor in School of Electrical and Computer Engineering at Oklahoma State University, OK, USA. He obtained his B.E. degree from School of Computer Science and Technology at Shandong University in 2007. Then he earned his M.S. and Ph.D. degree in Computer Science from University of Texas at Dallas in 2010 and 2013, respectively. His research interests include embedded system, wireless sensors, and emerging non-volatile memory. He has published more than 60 papers in related conferences and journals. His research is sponsored by National Science Foundation (NSF) and Air Force Research Lab (AFRL). He is also a recipient of Air Force Office of Sponsored Research (AFOSR) Summer Faculty Fellowship and Oklahoma State University CEAT Outstanding New Faculty Award.